SMP boolting policy analysis and doc

[PThierry]

Adding support for RP2350 in SMP mode (being cortex-m33 or Hazard3 based) requires a clean first step analysis to define how we aim to support:

• the boot step mechanism with a model as generic and portable as possible (rp2350 is core0 boot, and SIO FIFO protocol based core1 startup)
• the SMP mode scheduling policy of task's job. Job is considered as single threaded & no parallelism at job level
• the way to handle core-local vs SoC global IPs at kernel level
• th way to define the SMP config at DTS & SVD usage level if needed